Improved Signal Chains for Readout of CMOS Imagers
NASA’s Jet Propulsion Laboratory, Pasadena, California
Sunday, March 01 2009
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Two major imitations of prior readout signal chains are overcome.
An improved generic design has been devised for implementing signal chains involved in readout from complementary metal oxide/semiconductor (CMOS) image sensors and for other readout integrated circuits (ICs) that perform equivalent functions. The design applies to any such IC in which output signal charges from the pixels in a given row are transferred simultaneously into sampling capacitors at the bottoms of the columns, then voltages representing individual pixel charges are read out in sequence by sequentially turning on column-selecting field-effect transistors (FETs) in synchronism with source-follower and operational-amplifier-based amplifier circuits.
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