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OpenVPX — From Concept to Specification

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The OpenVPX Industry Working Group, a 28-company team founded by Mercury Computer Systems, collaborated with a common goal and accelerated the completion of a system architecture specification for open system COTS suppliers and integrators to specify, design, and build multi-vendor interoperable solutions.

Timeline:

  • January 2009 — OpenVPX Specification effort by Mercury Computer Systems begins, based on VPX embedded community’s need to accelerate multi-vendor interoperable solutions.
  • March 2009 — First open membership face-to-face meeting and call for membership.Spring/Summer 2009 — Ongoing meetings, conference calls and discussions.
  • October 2009 — OpenVPX specification V1.0 completed and transition to VITA 65 working group.
  • January 2010 — VITA 65 Working group completed comment resolution, balloting and ratification of the specification.
  • June 2010 — ANSI VITA 65-2010 ratification of the OpenVPX System Architecture Specification.

Figure 1. Cascading Challenges
Figure 1. Cascading Challenges
Countless hours were spent with embedded community technical and business leaders (suppliers and integrators) to come up with a system-level architecture specification, dedicated to creating well-defined interoperability points for multi-vendor, 3U and 6U VPX integrated solutions. The inter-company marathon was a testament to what can be done when experts are dedicated to solving a significant industry issue for the good of the ultimate primary customer — the warfighters.

So What?

If the following is important to your company or your customer, then OpenVPX should be important to you.

  • Reduce TCO in integrated systems life cycle;
  • Use of common language for simplified RFP generation;
  • Choice of ecosystems to lower costs, get best-of-breed capabilities;
  • Technology refresh possibilities with reduced obsolescence hurdles;
  • Highly interoperable, multi-vendor integrated solutions development;
  • Open standards, performance migration, and proliferation;
  • Reduced risk to deployment for QRC programs;
  • 1 GiGE, 10 GiGE, sRIO, PCIe gen 2.0 fabrics;
  • Optimized SWaP smart processing via open architectures.

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