
Optional buffered analog input provides constant input impedance across time and frequency and eliminates sample-and-hold kickback, simplifying input matching for passive and active analog front ends, while reducing pass band ripple. A 1- to 6-dB programmable gain option gives customers flexibility to trade off between SNR and spurious free dynamic range (SFDR) with lowered input voltage swing. The ADS4149 family includes pin-compatible 12- and 14-bit options at 160 and 250 MSPS and buffered devices to enable customers to easily move to lower resolutions and samples rates without altering their core design. Migration path from the ADS6149 allows customers to shift to lower power options.
TI’s TSW1200 digital capture tool facilitates rapid analysis of the ADS4149 evaluation module (EVM). Available high-speed mezzanine connector (HSMC) and FPGA mezzanine connector (FMC) allow ADS4149 EVMs to mate to FPGA EVMs for system-level prototyping to speed development time.
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