Stackable Computer Architecture Moves to 3rd Generation

Change is a concept that is well known in the computer industry. Designers and manufacturers alike have embraced this trend in an ongoing race to increase computing power while reducing size, weight, and power and cost (SWaPaC). With the latest round of ultra-low power processors from Intel, VIA, AMD and DMP, stackable computer systems need to adapt as well, especially with respect to I/O, while striking a balance between new and legacy technology.

The best-known stackable computer architecture centers on the popular PC/104 form factor. It is an industry work-horse known for its rugged design and Figure 1. SUMIT connectors and signals small size. These self-stacking modules can serve as either a mezzanine with a single card or multiple cards for even greater I/O requirements. As it approaches twenty years of service with continuing growth and design wins, it’s in the process of a third technology refresh to accommodate the latest generation of high-integration, x86-compatible processors that support high-speed PCI Express, SATA, and USB serial I/O buses to enable an even more diverse range of embedded applications.

Originally, PC/104 was defined as a small 90 x 96mm module with unique mounting holes and the ISA bus implemented in a 104-pin connector capable of stacking multiple boards without the need of a card cage or enclosure. Later, when PCI-based processor and chipsets migrated from the desktop to the embedded space, PC/104-Plus was defined as a technology refresh to take advantage of the higher bandwidth I/O capability. This “second-generation” implementation defined the location and pin-out of a 120-pin stackable connector for PCI signals placed on the opposite side of the module from the PC/104 connector. Even though many different SBC (Single Board Computer) platforms support the PC/104-Plus implementation, the majority o fI/O expansion modules only have a PC/104 connector.

Today the parallel PCI bus is being replaced by the high-speed serial PCI Express both in chipset silicon and on SBC and I/O boards. For PC/104-size stackable systems, a third generation architecture was required for the addition of the new signals plus a stackable connector system that could handle the bandwidth of these signals. Specifically, the Generation 2 of PCI Express requires 5 GT/sec which is well beyond the capacity of either of the previous connectors. But how and where do you add another connector on a 90mm x 96mm module? How are legacy issues resolved to allow current users to migrate to faster processors while keeping their existing I/O modules? Should either or both of the 104-pin and 120-pin connectors be replaced?

To solve these dilemmas, the SFF-SIG (Small Form Factor Special Interest Group) developed two complementary design solutions. The first is a high-speed stackable interconnect standard called SUMIT and the second is a 90 x 96mm industry-standard module (ISM) board outline specification.